A self light-emitting display using light emitting elements has drawn attention as a next generation display in recent years. Among others, a display is known using an organic EL element of a current controlled light emitting element in which brightness is controlled by current, or an organic EL display. The organic EL display includes an active matrix type using a thin film transistor (TFT) in its display area and peripheral circuits. As one of its driving systems, a current programming system is used in which a current amount corresponding to image data is set in pixel circuits formed in pixels to cause the organic EL elements to emit light.
FIG. 16 illustrates an example configuration of a pixel circuit including an EL element using a conventional current programming system.
In FIG. 16, reference characters P1 and P2 denote scanning signals. A current data “Idata” is input as a data signal. The anode of the EL element is connected to the drain terminal of the TFT (M4) and the cathode of the EL element is connected to a ground potential CGND. Reference characters M1, M2 and M4 represent a p-type TFT and M3 indicates an n-type TFT.
FIG. 17 is a timing chart describing a method of driving a pixel circuit 2.
In FIG. 17, reference character (a) denotes a current data supplied to the current data Idata. Reference characters (b) and (c) signify scanning signals supplied to the scanning signals P1 and P2 respectively. A pixel to be noted is considered to be located in the i-th row.
Reference characters I(i−1), I(i) and I(i+1) indicate a current data Idata input into the pixel circuits 2 in the target columns in a row i−1 (preceding a target row by one row), a row i (a target row) and a row i+1 (succeeding the target row by one row).
First, at the point before a time t0 and in the pixel circuits 2 in the target row, a “Low” level signal is input into the scanning signal P1 and a “High” level signal is input into the scanning signal P2. The transistors M2 and M3 are turned off and M4 is turned on. In this state, a current data I(i−1) corresponding to the current data Idata preceding by one row is not input into the pixel circuits 2 in the target row i.
Secondly, at the time t0, the High level signal is input into the scanning signal P1 and the Low level signal is input into the scanning signal P2. The transistors M2 and M3 are turned on and M4 is turned on. In this state, the current data I(i) corresponding to the current data Idata in the target row is input into the pixel circuit 2 in the row i. At this point, the transistor M4 does not conduct, so that a current does not flow into the EL element. The input current data Idata develops a voltage according to the current driving capability of the transistor M1 across a capacitor C1 arranged between the gate terminal of the transistor M1 and the power source potential VCC.
Next, at the time t1, the High level signal is input into the scanning signal P2 and the transistor M2 is turned off. Subsequently, at the time t2, the Low level signal is input into the scanning signal P1 and the transistor M3 is turned off and the transistor M4 is turned on. At this state, since the transistor M4 conducts, a voltage developed across the capacitor C1 supplies the EL element with a current according to the current driving capability of the transistor M1. This causes the EL element to emit light with a brightness according to the supplied current.
However, a current flowing into an organic EL element in one pixel is very small and, in particular, the current data Idata causing the organic EL element to emit light with a low brightness is extremely small. For this reason, it takes quite much time to charge a data line at the time of programming a desired current, so that one scanning period (the period during which the scanning signal P2 is supplied with the Low level signal from time t0 to time t1) is not enough. Although a duty driving has been known in which a comparatively large current is set to the pixel circuit to control a light emitting period to control brightness, a flicker is generated unless the driving is performed with a high frequency to some extent.
For that purpose, Japanese Patent Application Laid-Open No. 2005-031635 proposes a display device in which a light emitting period is controlled by the duty driving while a display is being performed by the interlace system which forms one frame of two fields (odd and even fields).
FIG. 18 is a timing chart describing a method of driving a display device according to Japanese Patent Application Laid-Open No. 2005-031635.
In FIG. 18, one frame (or 1 frame in the figure) is composed of an “ODD field” and an “EVEN field”. Reference characters 1 to m denote row numbers in the display device. Reference characters X(1) to X(m) indicate scanning signals corresponding to each row. A row is selected during the input of the High level signal to perform the current programming. Reference characters Z(1) to Z(m) signify light emitting period controlling signals corresponding to each row. The element emits light during the input of the Low level signal and does not emit light during the input of the High level signal. In the odd field, only odd rows are selected to perform the current programming. In the even field, only even rows are selected to perform the current programming.
Thus, control lines corresponding to odd and even lines are separately driven and the EL elements are subjected to a duty drive, differentiating a light emitting period from a non-light emitting period between adjacent lines to remove flicker.